AMD intends to optimize shaders in games with a new patent
AMD has published a patent that mentions the possibility of distributing the image rendering load among several video chiplets. To do this, the game scene is divided into separate blocks, which are distributed among the chiplets to optimize the load of shaders in the game. The patent describes the use of two-level chiplets for this purpose.
When the GPU rasterizes an image, the shader units (ALUs) are responsible for assigning colors to individual pixels. Instead, textured polygons that are on specific pixels in a specific game scene are applied directly to the pixels. As a result, the generated task will adhere to atypical principles and differ only through textures on different pixels. This method is called SIMD (Single Instruction Set Data).
Modern games use graphics cards not only for these tasks, but also for several other procedures such as anti-aliasing, shadowing, occlusion, and more. As a result, tasks are not executed in parallel, but in turn, and in order to speed up their processing, it is necessary to increase the total computing power. Similar problems are not known to processors, which can distribute tasks between multiple cores and deal with them in parallel. The new AMD patent, in fact, is aimed at changing the order of operations in rasterization to distribute them between different chiplets in multi-chip graphics processors. This, however, requires two-level binning, which is also known as hybrid binning.
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